As the semiconductor industry has experienced rapid growth, many efforts have been made to integrate more devices within a substrate. The manufacturing of a field-effect transistor (FET) is focusing on the scaling down of the dimensions of the FET to improve the packing density of the semiconductor device. However, the classical planar transistor cannot achieve ultra-small dimensions due to physical constraints. Currently, various non-planar transistors, such as FinFET and gate-all-around (GAA) FET, are being developed. By now, the FinFET has entered manufacturing; the GAA FET is being considered as one of the next generation transistors owing to its good short-channel effect (SCE) control.
A nanowire FET is one of the GAA FET, which applies a plurality of semiconductor nanowires as channel regions between a source and a drain. The nanowire FET includes horizontal nanowire FET and vertical nanowire FET, in which the source-drain current flows in a direction parallel and perpendicular to the substrate surface, respectively. However, there are difficulties in improving the packing density of the semiconductor device because of the limitations in current manufacturing technology.